Parameterized graphs can be used to describe a large class of continuous dynamical systems, discontinuous discrete systems and hybrid systems. Many commercial and academic simulation tools use parameterized graphs to represent a variety of systems from transportation networks to finite state machines. Parameterized graphs contain two distinct but dependent pieces of information: topology and parameterization. Topology consists of a set of components and their connectivity, e.g., which components are connected to which and how. A set of parameters can parameterize each component in the topology. These parameters conform to a template or schema that defines the form the parameters should take, e.g., data-type, dimensions etc. The graph parameterization consists of the combined parameters for all components in a given topology.
Resistor-Inductor-Capacitor or RLC electrical circuits are simple examples of parameterized graphs. The topology of an RLC circuit consists of a number of interconnected resistors, capacitors and inductors. Each resistor, capacitor or inductor requires a single real number or parameter (e.g. resistance, capacitance or inductance) to describe how it behaves. The connectivity of the components and their parameters comprises a parameterized graph that represents the RLC circuit. For efficient simulation of continuous, discrete or hybrid systems, both topology and parameter information are typically analyzed by a compiler and reduced to salient information suitable for a simulation kernel. Compilation is typically performed for every variation of parameter.
In the context of the previous RLC example, suppose a simulation kernel simulates dynamical systems expressed in state-space form:
      [                                        x            .                                                y                      ]    =            [                                    A                                B                                                C                                D                              ]        ⁡          [                                    x                                                y                              ]      where x is the continuous state, u is the input and y is the output. A, B, C and D are coefficient matrixes and are computed by the compiler based on the parameterized graph representing the RLC circuit. In more formal terms, the compiler is, in part, a map F:P→R sending a set of input parameters p ∈P to a set of runtime data, r ∈R. In some cases, such as block diagram modeling, this map is independent of the way in which components are connected and P may be mapped to R without consideration of the topology. However, in many dynamical, discrete and hybrid systems, F is highly dependent on topology. In the RLC example, the state-space form, A, B, C and D, cannot be computed directly from the resistances, capacitances and inductances of the individual components, rather A, B, C and D arise from both topological and parametric analysis. The dependency of F on the topology presents a unique problem for the simulation of dynamical, discrete or hybrid systems, namely how to resimulate a system with the same topology but a new set of parameters without a requirement to reanalyze the topology. Most existing compilation schemes require complete reanalysis, both topological and parametric, if either the topology or the parameterization of a parameterized graph changes.